Course:                  Computer Architecture (CS 215)
Spring, 2003

Day/Time/Room:  TR/10:00am – 11:40am/WS103

 

Instructor:             William J. Joel

Office:                   WS 110

Office Hours:        Posted

Phone:                   837-9353

Email:                   joelw@wcsu.edu

 

Texts:                    Computer Systems Design & Architecture
Vincent P. Heuring & Harry F. Jordan
Prentice Hall, 2004

 

Course Objectives: By the end of this course you should be able to…

1.      State and discuss how number are represented and operated on by computers.

2.      Develop a simple circuit design using components discussed in-class.

3.      Discuss the nature of instruction sets and how they are implemented in CPU design.

4.      Discuss the fundamentals of data management, memory, and input/output architectures.

 

Tests:                     Four (4), non-cumulative tests, approximately one hour in duration
No mid-term exam
Cumulative final exam

 

Assignments:        Five (5) programming projects. No project submission will be accepted after its due date.

 

Attendance:          You are expected to be present for each class session. If you are absent, it is your responsibility to obtain class notes and handouts (if any) from your classmates; I will not keep extra copies of materials after they are initially distributed. 24-hour notice must be given if you cannot make a scheduled test, otherwise you will receive a grade of ‘0’ for the test.

 

Grading:               Quizzes                  40%     (lowest dropped)

Assignments           30%

Final exam              20%

Class                      10%

Participation                      

Total                      100%

Tentative Topic Outline:

Week

Topic(s)

Due dates

Heuring & Jordan

1
  • Introduction
  • Computer views
    • User
    • Programmer
    • Architect
    • Logic Designer
  • History

-

Ch 1

2
  • Digital logic
    • Truth tables
    • Logic gates
    • Digital components
      • Multiplexers / demultiplexers
    • Decoders
    • Digital components
      • Adder
      • Flip-flops
  • Registers
  • Reduction of digital logic
    • Algebraic reduction
    • Karnough map
    • Tabular reduction

-

Appendix A

3

Test 1

4
  • Instruction sets
    • Memory
    • ALU
    • Branch
    • Registers
    • Stacks
  • Simple RISC Computer (SRC)
    • Instruction formats
  • Register Transfer Notation (RTN)
    • Addressing modes

Project 1

Ch 2
Appendix B

5
  • Performance
    • RISC versus CISC
  • Computer languages
    • Compilers
    • Assemblers
  • Linking & loading

-

Ch 3

6
  • Processor design
    • Design process
    • 1-Bus SRC
    • Control Unit
    • 2,3-Bus design
    • Exceptions

Test 2

Ch 4

7

Project 2

8
  • Data representations
    • Fixed point numbers
    • Floating point numbers
  • Character codes
  • Arithmetic
    • Fixed point
      • Addition & subtraction
      • Multiplication & division
    • Floating point

-

Ch 6

9

Test 3

10
  • I/O
    • Programmed I/O
    • Interrupts
    • Direct Memory Access (DMA)

Project 3

Ch 7

11
  • Memory
    • Hierarchy
    • RAM
    • Cache
    • Virtual memory

-

Ch 8

12
  • Peripherals
    • Magnetic drives
      • RAID
    • Displays
    • Printers

Project 4

Ch 9

13
  • Networking
    • Types of communication
    • Topologies
    • Serial protocols
    • LANS
    • WANS (Internet)

Test 4

Ch 10

14
  • Final Project

Project 5

-

15
  • Review

-

-